1. Field of the Invention
The invention relates to semiconductor memory circuits.
2. Description of the Prior Art
Four transistor IGFET memory cells have been utilized in the past as dynamic memory cells. However, such four transistor IGFET storage cells are relatively unsuitable as static or DC storage cells. The most common static (i.e., DC) MOS storage cell utilizes six IGFETS, see U.S. Pat. No. 3,594,736 by Hoffman. However, the six transistor static storage cells utilize a substantial amount of power per cell, and also require substantially more chip area per cell. This is partly because two extra load devices are required, and because these load devices must have long channel length in order to minimize the power dissipation.